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document number: mc33285 rev. 5.0, 2/2007 freescale semiconductor advance information * this document contains certain information on a new product. specifications and information herein are subject to change without notice. ? freescale semiconductor, in c., 2007. all rights reserved. dual high-side tmos driver a single input controls the 33285 in driving two external high-side n- channel tmos power fets controlling incandescent or inductive loads. pulse width modulated (pw m) input control to 1.0 khz is possible. the 33285 contains a common internal charge pump used to enhance the gate voltage of both fets. an external charge capacitor provides access to the charge pump output. both external fets are protected against inductive load transients by separate internal s ource-to-gate dynamic clamps. the power fets are protecte d by the 33285 with short-circuit delay time of 800 s. the device is designed to withs tand reverse polarity battery and load dump transients, encount ered in automotive applications. features ? pwm capability ? power tmos number one (out1) short-circuit detection and short-circuit protection ? voltage range 7.0 v 40 v ? extended temperature range from -40 c 125 c ? load dump protected ? overvoltage detection and activation of out2 during overvoltage ? single input control for both output stages ? capacitor value of 100 nf connected to pin cp ? analog input control measurement detection ? out1 load leakage measurement detection ? pb-free packaging designated by suffix code ef figure 1. 33285 simplified application diagram high-side tmos driver d suffix ef suffix (pb-free) 98asb42564b 8-pin soicn 33285 ordering information device temperature range (t a ) package mc33285d/r2 -40c to 125c 8 soicn MCZ33285ef/r2 src out1 out2 drn gnd 33285 in cp v cc v pwr motor vcc input control
analog integrated circuit device data 2 freescale semiconductor 33285 internal block diagram internal block diagram figure 2. 33285 simplified internal bl ock and typical applications diagram out2 out1 src in v cc rthr drn v out2 -v drn > v th2 v out1 -v src > v th1 cp charge pump oscillator and r s load dump r s q detection s r q out2 activation time thrin1 thrin2 v ref c cp v ign m kl.30 + - - + + - + - oc detection start t ocdet i outn1 scpc i outn2 gnd i on2 i on1 bandgap tld det t out2ect divider t oc det
analog integrated circuit device data freescale semiconductor 3 33285 pin connections pin connections figure 3. 33285 pin connections table 1. 33285 pin definitions pin number pin name formal name definition 1 src source out2 external fet source connection 2 out1 output 1 this pin is output number 1 3 drn drain out1 and out2 external fet drain connection 4 out2 output 2 this pin is output number 2 5 cp charge pump external capacitor connection for internal the charge pump 6 v cc voltage power supply battery supply voltage 7 gnd ground this is the ground pin. 8 in input voltage level sensitive input for out1 and out2 2 3 4 8 7 6 5 1 1 2 4 3 8 7 5 6 in gnd cp v cc src out1 drn out2
analog integrated circuit device data 4 freescale semiconductor 33285 electrical characteristics maximum ratings electrical characteristics maximum ratings table 2. maximum ratings all voltages are with respect to ground unless otherwise no ted. exceeding these ratings may cause a malfunction or permanent damage to the device. ratings symbol value unit electrical ratings maximum voltage at pins out1 and out2 v out v vcc + 20 v maximum voltage at pin cp v cp 50 v input voltage v i at drn v drn -2.0 to 40 v input voltage v i at src v src -5.0 to 40 v input voltage at pin v cc v cc -2.0 to 40 v input voltage at pin in. condition: -2.0 v < v vcc < 40 v v in -2.0 to v vcc v operational voltage v vcc at pin v cc v vcc 7.0 to v i v thermal ratings storage temperature t stg -40 to150 c operating ambient temperature t a -40 to 125 c peak package reflow temperature during reflow (1) , (2) t pprt note 2 c notes 1. pin soldering temperature limit is for 10 seconds maximum dura tion. not designed for immersion so ldering. exceeding these lim its may cause malfunction or permanent damage to the device. 2. freescale?s package reflow capability meets pb-free requirements for jedec standard j-std-020c. for peak package reflow temperature and moisture sensitivity levels (msl), go to www.freescale.com, search by part number [e.g. remove pref ixes/suffixes and enter the core id to view all orderable parts . (i.e. mc33xxxd enter 33xxx), and review parametrics.
analog integrated circuit device data freescale semiconductor 5 33285 electrical characteristics static electrical characteristics static electrical characteristics table 3. static electric al characteristics characteristics noted under conditions t a from -40 c 125 c, v cc from 7 v 20 v, unless otherwise noted. typical values noted reflect the approximate parameter mean at t a = 25 c under nominal conditions, unless otherwise noted. characteristic symbol min typ max unit overvoltage and over current load dump activation time t out2act 300 460 620 ms error voltage threshold v drn - v src 1.12 ? 1.44 v src pin 1 leakage current ilc det 15 30 50 ma leakage current detection time tlc det 130 200 270 a drn pin 3 operating current (7.0 v < v drn < 20 v) i drn ? ? 1.5 ma leakage current (0 v < v drn < 20 v, v vcc < 4.0 v) i leak-drn -5.0 ? 5.0 a out1, pin 2, and out2 pin 4 output on voltage. charge pump on v on ? ? v cc + 15 v turn off current, v out > 0.5 v i outoff 66 110 154 a v cc pin 6 supply voltage range v cc 7.0 ? 40 v quiescent supply current at v cc = 20 v i cc ? ? 10 ma in pin 8 input low voltage out1 v il ? ? 0.7 v input high voltage out1 v ih 1.7 ? ? v input hysteresis out1 and out2 v hys 0.4 ? ? v input pull down current, 0.7 v < v in < 6.0 v i in 7.5 15 16.5 a open input voltage v iop ? ? 0.7 v input low voltage out2 v il2 ? ? 3.0 v input high voltage out2 v ih2 3.9 ? ? v
analog integrated circuit device data 6 freescale semiconductor 33285 electrical characteristics dynamic electrical characteristics dynamic electrical characteristics table 4. dynamic electri cal characteristics characteristics noted under conditions t a from -40 c 125 c, v cc from 7 v 20 v, unless otherwise noted. typical values noted reflect the approximate parameter mean at t a = 25 c under nominal conditions, unless otherwise noted. characteristic symbol min typ max unit over voltage and over current load dump detection time t ld det 250 400 550 s over current detection time toc det 520 800 1080 s out1 pin 2, and out2 pin 4 turn on time, out1: 8.0 nf, 10 a; out2:16 nf, 10 a -7.0 v < v cc < 10 v, v out > v cc + 7.0 -10 v < v cc < 20 v, v out > v cc + 11 t on ? ? ? ? 1.5 1.5 ms
analog integrated circuit device data freescale semiconductor 7 33285 functional description introduction functional description introduction the power fets are turned on by charging their gate capacities with a current flowin g out of pins out1 and out2. during pwm, the values of table below are guaranteed. they are measured with 8.0 nf on out1 and 16 nf on out2. test condition v in : ramp 0 v 2.5 v or 2.5 v 5.0 v. figure 4. turn on behavior the output voltages at out1 and out2 are limited by controlling the current sources i on1 , i on2 to avoid current flowing through the external or the internal zener diode. when voltage power supply plus threshold voltage (v cc + v th ) is reached, the current sources are turned off. ? threshold v th1 for out1 output voltage control is 7.0 v < v th1 < v z ? threshold v th2 for out2 output voltage control is 7.0 v < v th2 < 15 v turn off characteristics the power fets on out1 and out2 are turned off by discharging the gate capacity with the constant discharge current i outoff . ? discharge current i outxoff is i outxoff = 110 a condition: v out x > 0.5 v ( v in < v thrxin ) ? test conditions for switching off the power fets: 1. in open 2. stages disabled via pin in 3. stage out1 disabled by an over current error 20 ms 2.5 v 5.0 v in v ccp thrin1 thrin2 in v out1 0 v 0 v 2.5 v in 0 2.5 v 0 v 5.0 v v out2 in t on1 0 v vcc + 7.0 v out2 v out2max t on2 t on3 v out1max v out1 v out2 t on1 t on2 t on3 voltage v vcc minimum v out 1, out2 after t on1 = 100 sec minimum v out 1,out2 after t on2 = 1.0 sec minimum v out 1,out2 after t on3 = 1.5 sec 7.0 v < v vcc < 10 v 10 v < v vcc < 20 v 20 v < v vcc < 40 v v vcc - 0.7 v v vcc - 0.7 v v vcc - 0.7 v v vcc + 5.95 v v vcc + 9.35 v v vcc + 7.0 v v vcc + 11 v
analog integrated circuit device data 8 freescale semiconductor 33285 functional device operation operational modes functional device operation operational modes introduction the 33285 contains only one charge pump for two outputs.the outputs, out1 an d out2, are switched on and off by the input (in) .there are three ways to control the outputs: out1 can be switched alone out1 and out2 can be switched together out2 can be switched when out1 is already on in the last case, the voltage drop on out1 when charging out2 is limited. the external capacitor (c cp ) connected to the charge pump (cp) pin is used to store the charge continuously delivered by the charge pump. the voltage on this pin is limited to a maximum value v cpmax . both outputs are sourced with a constant current from c cp to switch them on. additionally, the gates of th e power fets are precharged from voltage power supply (v cc ) to prevent c cp from being discharged by a voltage on out1 or out2, is still lower than v vcc . the values of the output voltages are limited to v out1max and v out2max . the power fet on out1 is protected against an exceeded gate-source voltage by an internal zener diode. channel one protects the n-channel power fet on out1 undercurrent and short-circuit conditions. the drain-source voltage of the fet on out1 is checked if channel one is switched on. the internal error voltage threshold determines the maximum drain-source voltage allowing the power fet to stay in the on state. if th e measured drain-source voltage exceeds the internal error voltage threshold, the output of the short-circuit protection comparator (scpc) is enabled. if the output of the scpc is active longer than t ocdet , output out1 is switched off. after switching off the power fet on out1 by an short- circuit condition, the power fet can only be turned on again by the input in. when switching off the power fets their gate capacities are discharged by a constant current, i outoff . if the input in is disconnected, the 33285 outputs, out1 and out2, are in the off state. if overvoltage occurs on the drain (drn) pin for a time period longer than t lddet , out2 is switched on for the time t out2act . in an overvoltage condition out1 is off if in is below v ih . internal zener diode an on-chip zener diode is placed between out1 and the source (src). design guarantees v z > v th1 . zener clamping voltage between out1 and src is v th1 < v z < 20 v pwm capability the c pic2 is pwm capable on out2. the loss of charge on c cp when switching on out2 is refreshed until the start on the next pwm cycle to a va lue sufficient to guarantee the specified turn on behavior. the pwm capability is measured with a test circuit and load conditions: ? pwm cycle is period t = 20 ms ; out2 is switched on from 10 to 90 percent of t ? test condition v in ramps 2.5 v 5.0 v according to pwm cycle defined above cross talk between out1 and out2 if output out2 is switched on while out1 is already on, the voltage drop occurring on out1 is limited. voltage drop on out1: ?10 v < v vcc < 20 v : out1 not below v vcc + 7.0 v ? 7.0 v < v vcc < 20 v : out1 not below v vcc + 7.0 v each time out1 is switched on, a current i lcdet is sourced out of the src pin for the time t lcdet to check if there is an external leakage current on that node in the application. the high-side switch on out1 is turned on only if the test is successful.
analog integrated circuit device data freescale semiconductor 9 33285 packaging package dimensions packaging package dimensions for the most current package revision, visit www.freescale.com and perform a keyword search using the ?98a? listed below. d suffix ef suffix (pb-free) plastic package 98asb42564b issue u
analog integrated circuit device data 10 freescale semiconductor 33285 revision history revision history revision date description of changes 4.0 9/2006 ? implemented revision history page ? converted to freescale format ? added part number MCZ33285ef (pb-free) to ordering information 5.0 2/2007 ? added peak package reflow temperature during reflow (1) , (2) to maximum ratings ? added notes (1) and (2)
analog integrated circuit device data freescale semiconductor 11 33285 revision history
analog integrated circuit device data 12 freescale semiconductor 33285 revision history
mc33285 rev. 5.0 2/2007 information in this document is provided solely to enable system and software implementers to use freescale semiconduc tor products. there are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. freescale semiconductor reserves the right to make changes without further notice to any products herein. freescale semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does freescale semiconductor assume any liability ar ising out of the application or use of any product or circuit, and specifically discl aims any and all liability, including without limitation consequential or incidental damages. ?typical? parameters that may be provided in freescale semiconductor data s heets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals?, must be validated for each customer application by customer?s technical experts. freescale se miconductor does not convey any license under its patent rights nor the rights of others. freescale semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the fa ilure of the freescale semiconductor product could create a situation where personal injury or death may occur. should buyer purchase or use freescale semiconductor products for any such unintended or unauthorized application, buyer shall indemni fy and hold freescale semiconductor and its officers, employees, subsidiaries, affili ates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that freescale semiconductor was negligent regarding the design or manufacture of the part. freescale? and the freescale logo are trademarks of freescale semiconductor, inc. all other product or service names are the property of their respective owners. ? freescale semiconductor, inc., 2007. all rights reserved. how to reach us: home page: www.freescale.com e-mail: support@freescale.com usa/europe or locations not listed: freescale semiconductor technical information center, ch370 1300 n. alma school road chandler, arizona 85224 +1-800-521-6274 or +1-480-768-2130 support@freescale.com europe, middle east, and africa: freescale halbleiter deutschland gmbh technical information center schatzbogen 7 81829 muenchen, germany +44 1296 380 456 (english) +46 8 52200080 (english) +49 89 92103 559 (german) +33 1 69 35 48 48 (french) support@freescale.com japan: freescale semiconductor japan ltd. headquarters arco tower 15f 1-8-1, shimo-meguro, meguro-ku, tokyo 153-0064 japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com asia/pacific: freescale semiconductor hong kong ltd. technical information center 2 dai king street tai po industrial estate tai po, n.t., hong kong +800 2666 8080 support.asia@freescale.com for literature requests only: freescale semiconductor literature distribution center p.o. box 5405 denver, colorado 80217 1-800-441-2447 or 303-675-2140 fax: 303-675-2150 ldcforfreescalesemiconductor@hibbertgroup.com rohs-compliant and/or pb-free versions of freescale products have the functionality and electrical characteristics of thei r non-rohs-compliant and/or non-pb-free counterparts. for further information, see http://www.freescale.com or contact your freescale sales representative. for information on freescale?s environmental products program, go to http:// www.freescale.com/epp .

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